Practical Hardware Transactional vEB Trees-Reference-Cited by-同舟云学术

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Practical Hardware Transactional vEB Trees

Published:2024-02-20 Issue: Volume: Page:215-228
ISSN:
Container-title:Proceedings of the 29th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming
language:
Short-container-title:

Author:

Khalaji Mohammad¹^ORCID,Brown Trevor¹^ORCID,Daudjee Khuzaima¹^ORCID,Aksenov Vitaly²^ORCID

Affiliation:

1. University of Waterloo, Waterloo, Ontario, Canada

2. City, University of London, London, United Kingdom

Funder

CRDPJ

RGPIN

DGECR

University of Waterloo

Ontario Research Foundation

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3627535.3638504

Reference48 articles.

1. Software-improved hardware lock elision

2. Maya Arbel-Raviv, Trevor Brown, and Adam Morrison. 2018. Getting to the Root of Concurrent Binary Search Tree Performance. In 2018 USENIX Annual Technical Conference, USENIX ATC 2018, Boston, MA, USA, July 11--13, 2018. USENIX Association, 295--306. https://www.usenix.org/conference/atc18/presentation/arbel-raviv

3. Nicole Bidoit, Melanie Herschel, and Katerina Tzompanaki. 2014. Query-Based Why-Not Provenance with NedExplain. In Proceedings of the 17th International Conference on Extending Database Technology, EDBT 2014, Athens, Greece, March 24--28, 2014. OpenProceedings.org, 145--156.

4. Performance Pathologies in Hardware Transactional Memory

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