μIR -An intermediate representation for transforming and optimizing the microarchitecture of application accelerators-Reference-Cited by-同舟云学术

μIR -An intermediate representation for transforming and optimizing the microarchitecture of application accelerators

Published:2019-10-12 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture
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Author:

Sharifian Amirali¹,Hojabr Reza¹,Rahimi Navid¹,Liu Sihao²,Guha Apala¹,Nowatzki Tony²,Shriraman Arrvindh¹

Affiliation:

1. Simon Fraser University

2. University of California, Los Angeles

Funder

Natural Sciences and Engineering Research Council of Canada

Semiconductor Research Corporation

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3352460.3358292

Reference56 articles.

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2. Enabling rapid design space exploration and prototyping of dnn accelerators. http://pwp.gatech.edu/ece-synergy/wp-content/uploads/sites/332/2019/02/2_NNDataflowAnalysis.pdf. Enabling rapid design space exploration and prototyping of dnn accelerators. http://pwp.gatech.edu/ece-synergy/wp-content/uploads/sites/332/2019/02/2_NNDataflowAnalysis.pdf.

3. Mlir primer: A compiler infrastructure for the end of mooreâĂŹs law. https://github.com/tensorflow/mlir. Mlir primer: A compiler infrastructure for the end of mooreâĂŹs law. https://github.com/tensorflow/mlir.

4. Specification for the firrtl language. https://github.com/freechipsproject/firrtl/blob/master/spec/spec.pdf. Specification for the firrtl language. https://github.com/freechipsproject/firrtl/blob/master/spec/spec.pdf.

5. Vivado Design Suite. https://www.xilinx.com/products/design-tools/vivado.html. Vivado Design Suite. https://www.xilinx.com/products/design-tools/vivado.html.

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