SYCLops: A SYCL Specific LLVM to MLIR Converter-Reference-Cited by-同舟云学术

SYCLops: A SYCL Specific LLVM to MLIR Converter

Published:2022-05-10 Issue: Volume: Page:
ISSN:
Container-title:International Workshop on OpenCL
language:
Short-container-title:

Author:

Singer Alexandre¹,Gao Frank¹,Wang Kai-Ting Amy¹

Affiliation:

1. Huawei Canada Research Centre, Canada

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3529538.3529992

Reference17 articles.

1. 2020. Khronos SYCL Working Group: SYCL Specification - Generic heterogeneous computing for modern C++. https://www.khronos.org/registry/SYCL/specs/sycl-2020-provisional.pdf . Revision Date : June 30, 2020 . 2020. Khronos SYCL Working Group: SYCL Specification - Generic heterogeneous computing for modern C++. https://www.khronos.org/registry/SYCL/specs/sycl-2020-provisional.pdf. Revision Date: June 30, 2020.

2. 2022. ’affine’ Dialect. https://mlir.llvm.org/docs/Dialects/Affine/. 2022. ’affine’ Dialect. https://mlir.llvm.org/docs/Dialects/Affine/.

3. 2022. Huawei Ascend 910. https://www.hisilicon.com/en/products/Ascend/Ascend-910. Revision Date : 2022 . 2022. Huawei Ascend 910. https://www.hisilicon.com/en/products/Ascend/Ascend-910. Revision Date: 2022.

4. 2022. Intel oneAPI DPC++/C++ Compiler. https://www.intel.com/content/www/us/en/developer/tools/oneapi/dpc-compiler.html . Accessed : March 31, 2022 . 2022. Intel oneAPI DPC++/C++ Compiler. https://www.intel.com/content/www/us/en/developer/tools/oneapi/dpc-compiler.html. Accessed: March 31, 2022.

5. 2022. LLVM Loop Terminology (and Canonical Forms). https://llvm.org/docs/LoopTerminology.html . Revision Date : February 22, 2022 . 2022. LLVM Loop Terminology (and Canonical Forms). https://llvm.org/docs/LoopTerminology.html. Revision Date: February 22, 2022.

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