Evolutionary functional recovery in virtual reconfigurable circuits

Author:

Sekanina Lukáš1

Affiliation:

1. Brno University of Technology, Brno, Czech Republic

Abstract

A virtual reconfigurable circuit (VRC) is a domain-specific reconfigurable device developed using an ordinary FPGA in order to easily implement evolvable hardware applications. While a fast partial runtime reconfiguration and application-specific programmable elements represent the main advantages of VRC, the main disadvantage of the VRC is the area consumed. This study describes experiments conducted to estimate how the use of VRC influences the dependability of FPGA-based evolvable systems. It is shown that these systems are not as sensitive to faults as their area-demanding implementations might suggest. An evolutionary algorithm is utilized to design fault tolerant circuits as well as to perform an automatic functional recovery when faults are detected in the configuration memory of the FPGA. All the experiments are performed on models of reconfigurable devices.

Publisher

Association for Computing Machinery (ACM)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Reference35 articles.

1. Heavy ion effects on configuration logic of Virtex FPGAs

2. Carmichael C. Caffrey M. and Salazar A. 2000. Correcting single-event upsets through virtex partial configuration. Xilinx Application Note XAPP 216. Carmichael C. Caffrey M. and Salazar A. 2000. Correcting single-event upsets through virtex partial configuration. Xilinx Application Note XAPP 216.

3. Lecture Notes in Computer Science;Garvie M.,2003

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