A timing graph based approach to mode merging-Reference-Cited by-同舟云学术

A timing graph based approach to mode merging

Published:2015-06-07 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 52nd Annual Design Automation Conference
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Author:

Sripada Subramanyam¹,Palla Murthy²

Affiliation:

1. Synopsys Inc.

2. Synopsys India Pvt. Ltd.

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/2744769.2744787

Reference6 articles.

1. Jing-Jia Nian; Shih-Heng Tsai; Shao-Lun Huang "A unified Multi-Corner Multi-Mode static timing analysis engine " ASP-DAC 2010 Jing-Jia Nian; Shih-Heng Tsai; Shao-Lun Huang "A unified Multi-Corner Multi-Mode static timing analysis engine " ASP-DAC 2010

2. Onaissi S.; Taraporevala F.; Jinfeng Liu; Najm F. "A fast approach for static timing analysis covering all PVT corners " DAC 2011 10.1145/2024724.2024899 Onaissi S.; Taraporevala F.; Jinfeng Liu; Najm F. "A fast approach for static timing analysis covering all PVT corners " DAC 2011 10.1145/2024724.2024899

3. Rajagopal K. A.; Sivakumar R.; Arvind N. V.; Sreeram C.; Visvanathan V.; Dhuri S.; Chander R.; Fortner P.; Sripada S.; Qiuyang Wu "A comprehensive solution for true hierarchical timing and crosstalk delay signoff " VLSI Design 2006. 10.1109/VLSID.2006.8 Rajagopal K. A.; Sivakumar R.; Arvind N. V.; Sreeram C.; Visvanathan V.; Dhuri S.; Chander R.; Fortner P.; Sripada S.; Qiuyang Wu "A comprehensive solution for true hierarchical timing and crosstalk delay signoff " VLSI Design 2006. 10.1109/VLSID.2006.8

4. Subrangshu K. Das; Ajay J. Daga; Aishwarya Singh; Vikas Sachdeva "The Automatic Generation of Merged-Mode Design Constraints" DAC 2009 User Track Subrangshu K. Das; Ajay J. Daga; Aishwarya Singh; Vikas Sachdeva "The Automatic Generation of Merged-Mode Design Constraints" DAC 2009 User Track

5. Shuo Zhou; Bo Yao; Hongyu Chen; Yi Zhu; Chung-Kuan Cheng; Hutton M.; Collins T.; Srinivasan S.; Chou N.; Suaris P. "Improving the efficiency of static timing analysis with false paths " ICCAD-2005. Shuo Zhou; Bo Yao; Hongyu Chen; Yi Zhu; Chung-Kuan Cheng; Hutton M.; Collins T.; Srinivasan S.; Chou N.; Suaris P. "Improving the efficiency of static timing analysis with false paths " ICCAD-2005.

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