1. [n.d.]. 1-Transistor SRAM Cell Scales to FinFET Technology Node. https://www.eeweb.com/profile/max-maxfield/articles/1-transistor-sram-cell-scales-to-finfet-technology-node/. [n.d.]. 1-Transistor SRAM Cell Scales to FinFET Technology Node. https://www.eeweb.com/profile/max-maxfield/articles/1-transistor-sram-cell-scales-to-finfet-technology-node/.
2. [n.d.]. CPLEX Optimizer. https://www.ibm.com/analytics/cplex-optimizer. [n.d.]. CPLEX Optimizer. https://www.ibm.com/analytics/cplex-optimizer.
3. [n.d.]. Multiple Knapsack Problem. http://www.or.deis.unibo.it/kp/Chapter6.pdf. [n.d.]. Multiple Knapsack Problem. http://www.or.deis.unibo.it/kp/Chapter6.pdf.
4. [n.d.]. Stringent Tests from ICs to Modules Ensure DRAM Reliability. https://www.atpinc.com/blog/dram-testing-module-chips-ic-burn-in-quality-characteristics. [n.d.]. Stringent Tests from ICs to Modules Ensure DRAM Reliability. https://www.atpinc.com/blog/dram-testing-module-chips-ic-burn-in-quality-characteristics.
5. [n.d.]. THE CIFAR-10 DATASET. https://www.cs.toronto.edu/~kriz/cifar.html. [n.d.]. THE CIFAR-10 DATASET. https://www.cs.toronto.edu/~kriz/cifar.html.