Modeling techniques for logic locking

Author:

Sweeney Joseph1,Heule Marijn J. H.1,Pileggi Lawrence1

Affiliation:

1. Carnegie Mellon University

Funder

Honeywell Federal Manufacturing and Technologies

Defense Advanced Research Projects Agency

Publisher

ACM

Reference31 articles.

Cited by 18 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Removal of SAT-Hard Instances in Logic Obfuscation Through Inference of Functionality;ACM Transactions on Design Automation of Electronic Systems;2024-07-09

2. From Full-Custom to Gate-Array ASIC for Hardware IP Protection;2024 IEEE 17th Dallas Circuits and Systems Conference (DCAS);2024-04-19

3. Quantifying the Efficacy of Logic Locking Methods;2024 37th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID);2024-01-06

4. Advances in Logic Locking;Hardware Security;2024

5. Angriffe und Verschlüsselungen;Logic Locking;2024

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