Distributed Pinning Spot Model for High-k Insulator - III-V Semiconductor Interfaces-Reference-Cited by-同舟云学术

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Distributed Pinning Spot Model for High-k Insulator - III-V Semiconductor Interfaces

Published:2009 Issue: Volume:7 Page:122-128
ISSN:1348-0391
Container-title:e-Journal of Surface Science and Nanotechnology
language:en
Short-container-title:e-J. Surf. Sci. Nanotechnol.

Author:

Akazawa Masamichi¹,Hasegawa Hideki¹

Affiliation:

1. Research Center for Integrated Quantum Electronics (RCIQE) and Graduate School of Information Science and Technology, Hokkaido University, Japan

Publisher

Surface Science Society Japan

Subject

Surfaces, Coatings and Films,Surfaces and Interfaces,Mechanics of Materials,Condensed Matter Physics,Bioengineering,Biotechnology

Link

http://www.jstage.jst.go.jp/article/ejssnt/7/0/7_0_122/_pdf

Reference12 articles.

1. MBE growth and applications of silicon interface control layers

2. [2] Y. G. Xie, S. Kasai, H. Takahashi, C. Jiang, and H. Hasegawa, IEEE Electron Device. Lett. 22, 312 (2001).

3. [3] K. Rajagopalan, J. Abrokwah, R. Droopad, and M. Passlack, IEEE Electron Device. Lett. 27, 959 (2006).

4. [4] Y. Xuan, Y. Q. Wu, and P. D. Ye, IEEE Electron Device. Lett. 29, 294 (2008).

5. [5] M. Akazawa and H. Hasegawa, J. Vac. Sci. Technol. B 25, 1481 (2007).

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1. Mechanisms of GaAs surface passivation by a one-step dry process using low-frequency plasma enhanced chemical deposition of silicon nitride;Microelectronic Engineering;2020-09

2. Reduction of interface state density at SiO2 /InAlN interface by inserting ultrathin Al2 O3 and plasma oxide interlayers;physica status solidi (b);2017-01-25

3. Charged Defect Quantification in Pt∕Al2O3∕In0.53Ga0.47As∕InP MOS Capacitors;Journal of The Electrochemical Society;2011

4. Surface passivation of III–V semiconductors for future CMOS devices—Past research, present status and key issues for future;Applied Surface Science;2010-07

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