Design of Solar Cell for Micro System Using Standard CMOS Process-Reference-Cited by-同舟云学术

Design of Solar Cell for Micro System Using Standard CMOS Process

Published:2019-08-01 Issue:8 Volume:139 Page:252-257
ISSN:1341-8939
Container-title:IEEJ Transactions on Sensors and Micromachines
language:en
Short-container-title:IEEJ Trans. SM

Author:

Zenibayashi Daigo¹,Sugiura Takaya¹,Nakano Nobuhiko¹

Affiliation:

1. Department of Electronics and Electrical Engineering, Faculty of Science and Technology, Keio University

Publisher

Institute of Electrical Engineers of Japan (IEE Japan)

Subject

Electrical and Electronic Engineering,Mechanical Engineering

Link

https://www.jstage.jst.go.jp/article/ieejsmas/139/8/139_252/_pdf

Reference8 articles.

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3. (3) Y. Minami, K. Igarashi, T. Sugiura, and N. Nakano : “Area-efficient Cross-Coupled Charge Pump for On-chip Solar Cell”, 2016 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), pp. 1-6 (2016)

4. (4) K. Igarashi, Y. Minami, and N. Nakano : “Heterogeneous Integration of Boost Power Supply and On-Chip Solar Cell using triple well CMOS Process”, IEEJ Trans. EIS, Vol. 138, No. 1, pp. 41-49 (2018)

5. (5) J. Zhao, A. Wang, M. Taouk, S. R. Wenham, and M. A. Green : “20% Efficient Photovoltaic Module”, IEEE Electron Device Letters, Vol. 14, No. 11, pp. 539-541 (1993)