Matrix-vector multiplication on a fixed-size linear systolic array-Reference-Cited by-同舟云学术

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Matrix-vector multiplication on a fixed-size linear systolic array

Published:2000-11 Issue:10-11 Volume:40 Page:1189-1203
ISSN:0898-1221
Container-title:Computers & Mathematics with Applications
language:en
Short-container-title:Computers & Mathematics with Applications

Author:

Milovanović E.I,Stojc̆ev M.K,Novaković N.M,Milovanović I.Z̆,Tokić T.I

Publisher

Elsevier BV

Subject

Computational Mathematics,Computational Theory and Mathematics,Modelling and Simulation

Reference28 articles.

1. Hardware/software codesign;DeMicheli,1997

2. Design of embedded systems: Formal models, validation and synthesis;Edwards,1997

3. Embedded software in real-time signal processing systems: Application and architecture trends;Paulin,1997

4. Configurable digit-serial convolver of type F;Milentijević;Microelectronics Journal,1996

5. VLSI Array Processors;Kung,1988

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Address generators for linear systolic array;Microelectronics Reliability;2010-02

2. Synthesis of a unidirectional systolic array for matrix–vector multiplication;Mathematical and Computer Modelling;2006-03

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