1. A CMOS floating-point vector arithmetic unit;Timmermann;IEEE Journal of Solid-State Circuits,1994
2. C. Lee, P. Chang, VLSI architecture for robot inverse kinematics computation, in: Proceedings of the Japan–USA Symposium on Flexible Automation, Osaka, Japan, 1986, pp. 45–51.
3. J.S. Walther, A unified algorithm for elementary functions, in: Spring Joint Computer Conference (SJCC), 1971, pp. 379–385.
4. F.T. Leighton, Introduction to Parallel Algorithms and Architectures: Arrays·Trees·Hypercubes, Morgan Kaufmann Publishers, San Mateo, CA, 1992.
5. S.Y. Kung, VLSI Array Processors, Prentice Hall, Englewood Cliffs, NJ, 1988.