A low-cost built-in error correction circuit design for STT-MRAM reliability improvement-Reference-Cited by-同舟云学术

A low-cost built-in error correction circuit design for STT-MRAM reliability improvement

Published:2013-09 Issue:9-11 Volume:53 Page:1224-1229
ISSN:0026-2714
Container-title:Microelectronics Reliability
language:en
Short-container-title:Microelectronics Reliability

Author:

Kang Wang,Zhao WeiSheng,Wang Zhaohao,Zhang Yue,Klein Jacques-Olivier,Zhang Youguang,Chappert Claude,Ravelosona Dafiné

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

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4. Spintronic devices for memory and logic applications;Dieny,2011

5. New non-volatile logic based on spin-MTJ;Zhao;Phys Status Solidi A,2008

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