Chip-Package Interaction in 3D stacked IC packages using Finite Element Modelling

Author:

Vandevelde Bart,Ivankovic A.,Debecker B.,Lofrano M.,Vanstreels K.,Guo W.,Cherman V.,Gonzalez M.,Van der Plas G.,De Wolf I.,Beyne E.,Tokei Z.

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference10 articles.

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2. van der Sluis O, Engelen RAB, van Driel WD, van Gils MAJ, van Silfhout RBR. Efficient damage sensitivity analysis of advanced Cu/low-k bond pad structures using area release energy. In: Proceedings EuroSimE conference, 2006. p. 34–41.

3. Auersperg J, Vogel D, Lehr MU, Grillberger M, Michel B. Crack and damage in low-k BEoL stacks under assembly and CPI aspects. In: Eurosime conference, 2011.

4. Beyne E, Van Olmen J, Swinnen B, Sabuncuoglu Tezcan D, Jourdain A, Limaye P. Through-Si-via technology solutions for 3D System Integration. In: Solid state devices and materials conference – SSDM, 2009, Sendai, Japan, 7–9 October 2009. p. 84–5.

5. Croes BK, et al. Reliability concerns in copper TSV’s: methods and results. In: Invited paper at the 19th international symposium on the physical & failure analysis of integrated circuits, 2012.

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