3D gate-all-around bandgap-engineered SONOS flash memory in vertical silicon pillar with metal gate-Reference-Cited by-同舟云学术

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3D gate-all-around bandgap-engineered SONOS flash memory in vertical silicon pillar with metal gate

Published:2013-08 Issue: Volume:86 Page:6-10
ISSN:0038-1101
Container-title:Solid-State Electronics
language:en
Short-container-title:Solid-State Electronics

Author:

Oh Jae-Sub,Yang Seong-Dong,Lee Sang-Youl,Kim Young-Su,Kang Min-Ho,Lim Sung-Kyu,Lee Hi-Deok,Lee Ga-Won

Publisher

Elsevier BV

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference23 articles.

1. Shin YS. In: proc symp VLSI circuits tech dig. 2005. p. 156–9.

2. Kim KN. In: proc int symp VLSI-TSA. 2008. p. 5–9.

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1. Scalability of nano-island based memory devices;Nanomaterials-Based Charge Trapping Memory Devices;2020

2. Low-voltage high-speed programming gate-all-around floating gate memory cell with tunnel barrier engineering;Japanese Journal of Applied Physics;2018-04-27

3. Effects of Asymmetric String Structure on Word-Line Interference in the Vertical NAND Flash Memory Devices;Journal of Nanoscience and Nanotechnology;2017-06-01

4. Effect of the Nanoscale Bitline String Thickness on the Electric Characteristics of Vertical NAND Flash Memory Devices;Journal of Nanoscience and Nanotechnology;2017-06-01

5. Enhancement Mechanisms of the Silicon-Oxide-Nitride-Oxide-Silicon Memory Devices with Nanoscale High-k Structures;Journal of Nanoscience and Nanotechnology;2016-10-01

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