1. A study of the advantages to the photolithography process brought by the high NA EUV exposure tool in advanced logic design rules;Li,2021
2. High-NA EUV optics – The key for miniaturization of integrated circuits in the next decade;Feldmann,2019
3. Double patterning design split implementation and validation for the 32 nm node;Drapeau,2007
4. Sub-40-nm half-pitch double patterning with resist freezing process;Hori,2008
5. Technology trends in 2.5D/3D packaging and heterogeneous integration;Kawano,2021