Writing current reduction and total set resistance analysis in PRAM-Reference-Cited by-同舟云学术

Writing current reduction and total set resistance analysis in PRAM

Published:2008-04 Issue:4 Volume:52 Page:591-595
ISSN:0038-1101
Container-title:Solid-State Electronics
language:en
Short-container-title:Solid-State Electronics

Author:

Jeong C.W.,Kang D.H.,Ha D.W.,Song Y.J.,Oh J.H.,Kong J.H.,Yoo J.H.,Park J.H.,Ryoo K.C.,Lim D.W.,Park S.S.,Kim J.I.,Oh Y.T.,Kim J.S.,Shin J.M.,Park Jaehyun,Fai Y.,Koh G.H.,Jeong G.T.,Jeong H.S.,Kim Kinam

Publisher

Elsevier BV

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference8 articles.

1. Oh JH, Park JH, Lim YS, Lim HS, Oh YT, Kim JS, et al. Full integration of highly manufacturable 512Mb PRAM based on 90nm technology. In: IEDM Tech Dig, 2006. p. 49–51.

2. Hwang YN, Lee SH, Ahn SJ, Lee SY, Ryoo KC, Hong HS, et al. Writing current reduction for high-density phase-change memory. In: IEDM Tech Dig, 2003. p. 893–97.

3. Matsuzaki N, Kurotsuchi1 K, Matsui1 Y, Tonomura1 O, Yamamoto1 N, Fujisaki1 Y, et al. Oxygen-doped GeSbTe phase-change memory cells featuring 1.5-V/100-μA Standard 0.13-μm CMOS operations. In: IEDM Tech Dig, 2005. p. 758–61.

4. Jeong CW, Ahn SJ, Hwang YN, Song YJ, Oh JH, Lee SY, et al. Switching current scaling and reliability evaluation in PRAM. In: Proceedings of NVSMW, 2004. p. 28–9.

5. Ahn SJ, Hwang YN, Song YJ, Lee SH, Lee SY, Park JH, et al. Highly reliable 50nm contact cell technology for 256Mb PRAM, Symposium onVLSI Tech Dig, 2005. p. 18–9.

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