High performance 70nm gate length germanium-on-insulator pMOSFET with high-k/metal gate-Reference-Cited by-同舟云学术

High performance 70nm gate length germanium-on-insulator pMOSFET with high-k/metal gate

Published:2009-07 Issue:7 Volume:53 Page:723-729
ISSN:0038-1101
Container-title:Solid-State Electronics
language:en
Short-container-title:Solid-State Electronics

Author:

Romanjek K.,Hutin L.,Le Royer C.,Pouydebasque A.,Jaud M.-A.,Tabone C.,Augendre E.,Sanchez L.,Hartmann J.-M.,Grampeix H.,Mazzocchi V.,Soliveres S.,Truche R.,Clavelier L.,Scheiblin P.,Garros X.,Reimbold G.,Vinet M.,Boulanger F.,Deleonibus S.

Publisher

Elsevier BV

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference18 articles.

1. The international technology roadmap for semiconductors. Semiconductor Industry Association. .

2. Pouydebasque A, Le Royer C, Tabone C, Romanjek K, Augendre E, Sanchez L, et al. First demonstration of deep sub-micron germanium-on-insulator pMOSFET with adapted threshold voltage. In: VLSI-TSA conference proceedings; 2008. p. 16–7.

3. Le Royer C et al. 12μm p-MOSFETs with high-k and metal gate fabricated in a Si process line on 200mm GeOI wafers In: ESSDERC; 2007. p. 458–61.

4. Clavelier L et al. Review of some critical aspects of Ge and GeOI substrates. In: ECS; 2006. p. 789–805.

5. Pala M et al. Modeling of out-of-equilibrium transport effects in fully-depleted GeOI-MOSFETs. In: MSED; 2005.

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