Author:
Chauhan Yogesh Singh,Anghel Costin,Krummenacher Francois,Maier Christian,Gillon Renaud,Bakeroot Benoit,Desoete Bart,Frere Steven,Desormeaux Andre Baguenier,Sharma Abhinav,Declercq Michel,Ionescu Adrian Mihai
Subject
Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials
Reference28 articles.
1. Canepari A, Bertrand G, Giry A, Minondo M, Blanchet F, Jaouen H, et al. LDMOS modeling for analog and RF circuit designs. In: IEEE European solid-state device research conference (ESSDERC), September 2005. p. 469–72.
2. Frere S, Moens P, Desoete B, Wojciechowski D, Walton A. An improved LDMOS transistor model that accurately predicts capacitance for all bias conditions. In: Proceedings of the 2005 international conference on microelectronic test structures (ICMTS), April 2005. p. 75–9.
3. MOOSE: a physically based compact DC model of SOI LD MOSFETs for analogue circuit simulation;D’Halleweyn;IEEE Trans Computer-Aided Design Integr Circ Systems,2004
4. Anghel C. High voltage devices for standard MOS technologies: characterisation and modelling, Ph.D. dissertation, EPFL, 2004, thesis No. 3116.
5. Hefyene N, Anghel C, Ionescu A, Frere S, Gillon R, Vermandel M, et. al. An experimental approach for bias-dependent drain series resistances evaluation in asymmetric HV MOSFETs. In: IEEE European solid-state device research conference (ESSDERC). September 2001. p. 403–6.
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