Degradation of current drivability of Schottky barrier source/drain transistors induced by high-k gate dielectrics and possible measures to suppress the phenomenon

Author:

Ono Mizuki,Nishiyama Akira,Koyama Masato

Publisher

Elsevier BV

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference15 articles.

1. 30nm physical gate length CMOS transistors with 1.0ps n-MOS and 1.7ps p-MOS gate delays;Chau;IEDM Tech Dig,2000

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3. High performance 25nm gate CMOSFETs for 65nm node high speed MPUs;Goto;IEDM Tech Dig,2003

4. Ultra-low thermal budget CMOS process for 65nm-node low-operation-power applications;Ootsuka;IEDM Tech Dig,2003

5. A conventional 45nm CMOS node low-cost platform for general purpose and low power applications;Boeuf;IEDM Tech Dig,2004

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