1. 3-D ICs: a novel chip design for improving deep-submicrometer interconnect performance and systems-on-chip integration;Banerjee;Proc. IEEE,2001
2. System in package: the rebirth of SIP;Brown;Proc. IEEE Int. Conf. Custom Integr. Circuits,2004
3. System design issues for 3D System-in-Package (SiP);Miettinen;Proc. IEEE Int. Conf. Electron. Components Technol.,2004
4. Vertical single-gate CMOS inverters on laser-processed multilayer structures;Goeloe;Proc. IEEE Electron Device Meeting,1981
5. Multiple layers of silicon-on-insulator for nanostructure devices;Neudeck;J. Vac. Sci. Technol. B,1999