1. T.C. Chen, Y.W. Chang, Chapter 10: Floorplanning, Electronic Design Automation: Synthesis, Verification, and Testing, 2008, 575–634.
2. C.J. Alpert, D.P. Mehta, Handbook of Algorithm for Physical Design Automation, Auerbach Publications, New York, 2008, 139–257.
3. Vlsi module placement based on rectangle-packing by the sequence pair;Murata;IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.,1996
4. Tcg: a transitive closure graph based representation for general floorplans;Lin;IEEE Trans. Very Large Scale Integr. Syst.,2005
5. X. Hong, G. Huang, T. Cai, J. Gu, S. Dong, C. K. Chen, J. Gu, Corner block list: An effective and efficient topological representation of non-slicing floorplanning, ACM/IEEE Design Automatic Conference, 2000, 8–12.