Implementation of Digital Modulator Using Digital Multiplier for Wireless Applications in Verilog and Cadence

Author:

Usha S.M.,Nataraj K.R.

Publisher

Elsevier BV

Subject

General Earth and Planetary Sciences,General Environmental Science

Reference8 articles.

1. Tarik Kazaz, Mrima Kullin, Mesud Hadzialic. Design and Implementation of SDR Based QPSK Modulator on FPGA. Sarajevo, Bosnia and Herzegovina: 2013; 613-618, MIPRO 2013/CTI.

2. Sarita singh, Sachin Mittal. , VHDL Design and Implementation for optimum delay and area for Multiplier and Accumulator unit by 32 bit requntial multiplier. International Journal of engineering Trends and Technology: Vol3 issue 5-2012.

3. S.O. Popescu, A.S. Gontean and D. Ianchis. Implementation of a QPSK system on FPGA, IEEE 9thInternational Symposium on intelligent Systems and Informatics: September 8-10, 2011, Subotica, Serbia.

4. Wenmiao Song, Qiongqiong Yao, Design and Implement of QPSK Modem Based on FPGA. Baoding, Chna; 2010; 599-061; Volume 9; 2010 IEEE.

5. W. Song, Q. Yao, Design and implementation of QPSK Modem Based on FPGA. 2010.

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