What is Itanium Memory Consistency from the Programmer's Point of View?

Author:

Higham Lisa,Jackson LillAnne,Kawash Jalal

Publisher

Elsevier BV

Subject

General Computer Science,Theoretical Computer Science

Reference14 articles.

1. Information-flow models for shared memory with an application to the PowerPC architecture;Adir;IEEE Trans. on Parallel and Distributed Systems,2003

2. Arvind and J.W. Maessem. Memory model = instruction reordering + store atomicity. In Proceedings of ISCA 2006

3. P. Chatterjee and G. Gopalakrishnan. Towards a formal model of shared memory consistency for intel itaniumtm. In Proc. 2001 IEEE International Conference on Computer Design (ICCD), pages 515–518, Sept 2001

4. G. Gopalakrishnan, Y. Yang and H. Sivaraj. QB or not QB: An efficient execution verification tool for memory orderings. In Proc. 16th International Conference on Computer Aided Verification (CAV04), 2004

5. L. Higham and L. Jackson. Porting between itanium and sparc multiprocessing systems. In Accepted to: 18th ACM Symposium on Parallelism in Algorithms and Architectures (SPAA '06), to appear 2006

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Pitfalls in Memory Consistency Modelling;Parallel Processing Letters;2016-06

2. Partition consistency;Distributed Computing;2014-06-10

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