A novel four-quadrant/one-quadrant multiplier circuit

Author:

Santos Rodrigo Bispo dos,Souza Gabriel A.F.,Faria Lester A.

Funder

CNPq

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering

Reference36 articles.

1. Lopez-Martin, A.J., Carlosena, A., 1999. Geometric-mean based current-mode cmos multiplier/divider, in: ISCAS'99.Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No. 99CH36349), IEEE. pp.342-345.

2. Current mode cmos multiplier/divider circuit operating in linear/saturation regions;Lopez-Martin;Analog Integr Circ Sig Process,2011

3. Platt, J.C., Wall, M.F., Gribble, G.E., Mead, C.A., 1992. Linear, continuous-time, two quadrant multiplier. US Patent 5,107,149.

4. Cmos design of a low power and high precision four-quadrant analog multiplier;Beyraghi;AEU- International Journal of Electronics and Communications,2015

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