High-speed low-power comparator for analog to digital converters

Author:

Khorami Ata,Sharifkhani Mohammad

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering

Reference19 articles.

1. Design techniques for high-speed, high-resolution comparators;Razavi;IEEE J Solid-State Circuits,1992

2. A 10 b, 20 Msample/s, 35 mW pipeline A/D converter;Cho;IEEE J Solid-State Circuits,1995

3. Kickback noise reduction techniques for CMOS latched comparators;Figueiredo;IEEE Trans Circuits Syst II Express Briefs,2006

4. Clocked comparator for high-speed applications in 65nm technology;Abbas,2010

5. A low-power high-precision comparator with time-domain bulk-tuned offset cancellation;Lu;IEEE Trans Circuits Syst I Regul Pap,2013

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