Schmitt Trigger 12T1M Non-volatile SRAM cell with improved process variation tolerance

Author:

Singh Damyanti,Pandey NeetaORCID,Gupta Kirti

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering

Reference47 articles.

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3. Power and Thermal Effects of SRAM vs. Latch-Mux Design Styles and Clock Gating Choices;Li;Int Symp Low Power Electron Des ISLPED,2005

4. Sterpone L. A New Reconfigurable Clock-Gating Technique for Low Power SRAM-based FPGAs. Des. Autom. Test Eur. Conf. Exhib., IEEE; 2011, p. 1–6.

5. A dynamic voltage scaled microprocessor system;Burd;IEEE J Solid-State Circuits,2000

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