Low-voltage, high-speed CMOS analog latched voltage comparator using the “flipped voltage follower” as input stage-Reference-Cited by-同舟云学术

Low-voltage, high-speed CMOS analog latched voltage comparator using the “flipped voltage follower” as input stage

Published:2011-05 Issue:5 Volume:42 Page:785-789
ISSN:0026-2692
Container-title:Microelectronics Journal
language:en
Short-container-title:Microelectronics Journal

Author:

Achigui Hugues J.,Fayomi Christian,Massicotte Daniel,Boukadoum Mounir

Publisher

Elsevier BV

Subject

General Engineering

Reference17 articles.

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3. A 65-fJ/conversion-step 0.9-V 200-kS/s rail-to-rail 8-bit successive approximation ADC;Hong;IEEE J. Solid State Circuits,2007

4. The flipped voltage follower: a useful cell for low-voltage low-power circuit design;Gonzalez;IEEE Trans. Circuits Syst. I,2005

5. A high-speed CMOS comparator with 8-b resolution;Yin;IEEE J. Solid State Circuits,1992

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