The area-efficient gate level information flow tracking schemes of digital circuit with multi-level security lattice-Reference-Cited by-同舟云学术

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The area-efficient gate level information flow tracking schemes of digital circuit with multi-level security lattice

Published:2024-02 Issue: Volume:144 Page:106088
ISSN:1879-2391
Container-title:Microelectronics Journal
language:en
Short-container-title:Microelectronics Journal

Author:

Chen Yongliang^ORCID,Cui Xiaole^ORCID,Cui Xiaoxin,Zhang Xing

Funder

Shenzhen Science and Technology Innovation Committee

Publisher

Elsevier BV

Reference24 articles.

1. R/B-SecArch: A strong isolated SoC architecture based on red/black concept for secure and efficient cryptographic services;Guo;Microelectron. J.,2023

2. Hardware information flow tracking;Hu;ACM Comput. Surv.,2021

3. Design, threat analysis and countermeasures for cache replacement policy-affecting Hardware Trojans in the context of a many-core system;Hazra;Microelectron. J.,2023

4. K. Biba, Integrity Considerations for Secure Computer Systems MITRE Corporation, Bedford, Tech. rep., MA, Tech. Rep. TR-3153, 1977.

5. Secure Computer Systems: Mathematical Foundations;Bell,1989

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