Author:
Del Valle Pablo G.,Atienza David
Reference37 articles.
1. Design and implementation of a first-generation cell processor;Pham;Proc. ISSCC,2005
2. Niagara: a 32-way multithreaded SPARC processor;Kongetira;IEEE Micro,2005
3. Tilera Corporation, Tilera’s 64-core architecture, 2008, 〈www.tilera.com/products/processors.php〉.
4. Demystifying 3D ICs: the pros and cons of going vertical;Davis;IEEE Des. Test Comput.,2005
5. Multiobjective microarchitectural floorplanning for 2D and 3D ICs;Healy;IEEE Trans.CAD,2007
Cited by
12 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献