A 5-bit lumped 0.18-μm CMOS step attenuator with low insertion loss and low phase distortion in 3–22 GHz applications
Author:
Funder
National Natural Science Foundation of China
Publisher
Elsevier BV
Subject
General Engineering
Reference31 articles.
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4. A 10–50-GHz CMOS distributed step attenuator with low loss and low phase imbalance;Min;IEEE J. Solid-State Circuits,2007
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