A self-adaptive correlated multiple sampling technique based on single-slope ADC for low-noise CMOS image sensors
Author:
Funder
Foundation for Innovative Research Groups of the National Natural Science Foundation of China
National Natural Science Foundation of China
Publisher
Elsevier BV
Reference24 articles.
1. 4μm-Pitch 50Mpixel 65/28nm stacked CMOS image sensor using multiple sampling;Kim,2023
2. A self-compensated approach for ramp kickback noise in CMOS image sensor column parallel single slope ADC;Guo;Microelectron. J.,2022
3. 2μs row time 12-bit column-parallel single slope ADC for high-speed CMOS image sensor;Wang;Microelectron. J.,2023
4. A 28.9–38.8 μW dual-mode 10-bit column parallel single-slope ADC with minimum voltage feedback for CMOS image sensors;Yuan;Microelectron. J.,2024
5. A 14-b 20-MS/s 78.8 dB-SNDR energy-efficient SAR ADC with background mismatch calibration and noise-reduction techniques for portable medical ultrasound systems;Liang;IEEE Transactions on Biomedical Circuits and Systems,2022
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