A 10bit 20 kS/s 17.7 nW 9.1ENOB reference-insensitive SAR ADC in 0.18 μm CMOS
Author:
Funder
National Natural Science Foundation of China
China Postdoctoral Science Foundation
Publisher
Elsevier BV
Subject
General Engineering
Reference13 articles.
1. A 0.92mW 10-bit 50-MS/s SAR ADC in 0.13μm CMOS process;Liu,2009
2. A 10-bit 100MS/s reference-free SAR ADC in 90 nm CMOS;Zhu;IEEE J. Solid State Circ.,2010
3. 10-bit 30-MS/s SAR ADC using a switchback switching method;Huang;IEEE Trans. Very Large Scale Integration (VLSI) Syst.,2013
4. Merged capacitor switching based SAR ADC with highest switching energy-efficiency;Hariprasath;Electron. Lett.,2010
5. A 0.6-V 38-nW 9.4-ENOB 20-kS/s SAR ADC in 0.18-μm CMOS for medical implant devices;Zhu;IEEE Trans. Circuits Syst. I: Reg. Papers,2015
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