An efficient and simple compact modeling approach for 3-D interconnects with IC׳s stack global electrical context consideration-Reference-Cited by-同舟云学术

An efficient and simple compact modeling approach for 3-D interconnects with IC׳s stack global electrical context consideration

Published:2015-02 Issue:2 Volume:46 Page:153-165
ISSN:0026-2692
Container-title:Microelectronics Journal
language:en
Short-container-title:Microelectronics Journal

Author:

Lorival Jean-Etienne^ORCID,Calmon Francis,Sun Fengyuan,Frantz Felipe,Plossu Carole,Le Berre Martine,O’Connor Ian,Valorge Olivier,Charbonnier Jean,Henry David,Gontrand Christian

Funder

Catrene European 3DIM3

Research National Agency

Publisher

Elsevier BV

Subject

General Engineering

Reference23 articles.

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3. High-speed design and broadband modeling of Through-Strata-Vias (TSVs) in 3D integration;Xu;IEEE Trans. Compon. Packag. Manuf. Technol.,2011

4. Closed-form expressions for the resistance and the inductance of different profiles of through-silicon vias;Liang;IEEE Electron Device Lett.,2011

5. Closed-form expressions of 3-D via resistance, inductance and capacitance;Savidis;IEEE Trans. Electron Devices,2009

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