1. The complexity of minimizing wire lengths in VLSI layouts;Bhatt,1982
2. Minimizing the Longest Edge in a VLSI Layout;Bhatt;MIT VLSI Memo 82-86,1982
3. On the area of binary tree layouts;Brent;Inform. Process. Lett.,1980
4. The architecture of the FAIM-1 symbolic multiprocessing system;Davis;Proc. 9th Internat. Joint Conf. on Artificial Intelligence,1985
5. Embedding tree structures in VLSI hexagonal arrays;Gordon;IEEE Trans. Comput.,1984