Deep transfer learning approach for digital circuits vulnerability analysis

Author:

Rahimifar M.M.ORCID,Jahanirad H.ORCID,Fathi M.

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Science Applications,General Engineering

Reference50 articles.

1. McSeVIC: A model checking based framework for security vulnerability analysis of integrated circuits;Abbassi;IEEE Access,2018

2. Embedded deterministic test points;Acero;IEEE Transactions on Very Large Scale Integration (VLSI) Systems,2017

3. Bhunia, S., Hsiao, M. S., Banga, M., & Narasimhan, S. (2014). Hardware Trojan attacks: Threat analysis and countermeasures.Proceedings of the IEEE,102(8), 1229-1247.

4. Hardware trust through layout filling: A hardware Trojan prevention technique;Ba,2016

5. Trojan Vulnerability Map: An efficient metric for modeling and improving the security level of hardware;Bakhshizadeh;IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences,2014

Cited by 1 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Transfer Learning Enabled Modeling Paradigm for PVT-aware Circuit Performance Estimation;ACM Transactions on Design Automation of Electronic Systems;2024-08-23

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