Poly-Si thin film transistors with a source overlap and a drain offset: leakage current characteristics
Author:
Publisher
Elsevier BV
Subject
Materials Chemistry,Metals and Alloys,Surfaces, Coatings and Films,Surfaces and Interfaces,Electronic, Optical and Magnetic Materials
Reference10 articles.
1. A 4-Mb CMOS SRAM with a PMOS thin-film-transistor load cell
2. Low Thermal Budget Poly-Si Thin Film Transistors on Glass
3. Analysis and design of a-Si TFT/LCD panels with a pixel model
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1. TFT character of Al electrode in TFT-LCD;Chinese Journal of Liquid Crystals and Displays;2017
2. A Three-Mask-Processed Coplanar a-IGZO TFT With Source and Drain Offsets;IEEE Electron Device Letters;2012-06
3. High-Performance Drain-Offset a-IGZO Thin-Film Transistors;IEEE Electron Device Letters;2011-05
4. Submicron-meter tunneling field-effect poly-Si thin-film transistors with a thinned channel layer;Microelectronic Engineering;2011-01
5. Leakage Current Reduction Techniques in Poly-Si TFTs for Active Matrix Liquid Crystal Displays: A Comprehensive Study;IEEE Transactions on Device and Materials Reliability;2006-06
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