Robust control of maximum photolithography overlay error in a pattern layer

Author:

Graff Noah,Hanasusanto Grani A.,Djurdjanović DraganORCID

Funder

Samsung Advanced Institute of Technology

Publisher

Elsevier BV

Subject

Industrial and Manufacturing Engineering,Mechanical Engineering

Reference13 articles.

1. Semiconductor Manufacturing Handbook;Geng,2018

2. Framework for Exploring the Interaction Between Design Rules and Overlay Control;Ghaida;Journal of Micro/Nanolithography, MEMS, and MOEMS,2013

3. Fundamental Principles of Optical Lithography: The Science of Microfabrication;Mack,2012

4. Design of a Sampling Strategy for Measuring and Compensating for Overlay Errors in Semiconductor Manufacturing;Chien;Int'l. Jour. of Prod. Research,2003

5. Matching Performance for Multiple Wafer Steppers Using an Advanced Metrology Procedure;v. d. Brink;SPIE Proc. Integrated Circuit Metrology, Inspection, and Proc. Control II,1988

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