1. Low-power and area-efficient carry select adder;Ramkumar;IEEE Trans. VLSI Syst.,2012
2. Area–delay–power efficient carry-select adder;Mohanty;IEEE Trans. Circuits Syst. II,2014
3. Soniya, Suresh Kumar, A review of different type of multiplier and multipliers-accumulator unit, International Journal of Emerging Trends and Technology in Computer Science 2(4), August 2013.
4. Survey: performance analysis of FIR filter design using modified truncation multiplier with SQRT based carry select adder;Penchalaiah;Int. J. Eng. Technol., spc,2018
5. A facile approach to design truncated multiplier based on HSCG-SCG CSLA adder;Penchalaiah;Mater. Today: Proc.,2021