Delay and area efficient approximate multiplier using reverse carry propagate full adder

Author:

Arulkarthick V.J.,Rathinaswamy Abinaya

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software

Reference10 articles.

1. Energy efficient approximate multiplication for digital signal processing and classification applications’;Narayanamoorthy;IEEE Trans. Very Large Scale Integr. (VLSI) Syst.,2015

2. A low-power, high-performance approximate multiplier with configurable partial error recovery;Liu;Proc. Conf. Exhibit.,2014

3. High accuracy approximate multiplier with error correction;H. Lin,2013

4. Design of low-error fixed width modified booth multiplier;Cho;IEEE Trans. Very Large Scale Integr. (VLSI) Syst.,2004

5. Design and analysis of approximate compressors for multiplication;Momeni;IEEE Trans. Comput.,2015

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