An 8-bit systolic AES architecture for moderate data rate applications-Reference-Cited by-同舟云学术

An 8-bit systolic AES architecture for moderate data rate applications

Published:2009-05 Issue:3 Volume:33 Page:221-231
ISSN:0141-9331
Container-title:Microprocessors and Microsystems
language:en
Short-container-title:Microprocessors and Microsystems

Author:

Farhan Sheikh Muhammad,Khan Shoab A.,Jamal Habibullah

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software

Reference15 articles.

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2. The Design of Rijndael;Daemen,2002

3. FIPS 197, Federal Information Processing Standards Publication (FIPS) 197, Specification for the Advanced Encryption Standard (AES), NIST’s AES, November 26, 2001. Available from: .

4. Keshab K. Parhi, VLSI Digital Signal Processing Systems: Design and Implementation, John Wiley and Sons, 1999, pp. 149–189, ISBN: 0-471-24186-5.

5. Trace scheduling: a technique for global microcode compaction;Fisher;IEEE Transactions on Computers,1981

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