A CNFET-based PVT-tolerant Hybrid Majority Logic 4:2 Compressor Design for High Speed Energy-Efficient Applications

Author:

Maleknejad Mojtaba,Mirhosseini Seyed Mostafa,Mohammadi Somayyeh

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software

Reference39 articles.

1. Modern Computer Arithmetic;Montuschi,2016

2. A Reduced-Bias Approach with a Lightweight Hard-Multiple Generator to Design a Radix-8 Modulo 2n + 1 Multiplier;Mirhosseini;IEEE Trans. Circuits Syst. II Express Briefs.,2017

3. 4-2 Carry-Save Adder Module;Weinberger;IBM Tech. Discl. Bull.,1981

4. Ultra low-voltage low-power CMOS 4-2 and 5-2 compressors for fast arithmetic circuits;Chang;IEEE Trans. Circuits Syst. I Regul. Pap.,2004

5. Energy efficient implementation of parallel CMOS multipliers with improved compressors;Baran,2010

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