Author:
Prithivi Raj M.,Kavithaa G.
Subject
Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software
Reference35 articles.
1. Ultra-low power VLSI circuit design demystified and explained: a tutorial;Alioto;IEEE Trans. Circuits Syst. I Reg. Pap.,2012
2. A 77% energy saving 22- single transistor phase clocking D-flip-flop with the adoptive-coupling configuration in 40nm CMOS;Chen,2011
3. A fully static topologically- compressed 21-transistor flip-flop with 75% power saving;Kawai;IEEE J. Solid-State Circuits,2014
4. Low-power 19-transistor true single-phase clocking flip-flop design based on logic structure reduction schemes;Lin;IEEE Trans. Very Large Scale Integr. (VLSI) Syst.,2017
5. Low-Power dual dynamic node pulsed hybrid flip-flop featuring efficient embedded logic;Absel;IEEE Trans. Very Large Scale Integr. (VLSI) Syst.,2013
Cited by
3 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Implementation of Low-Power Frequency Divider Circuit using GDI Technique;2022 6th International Conference on Computation System and Information Technology for Sustainable Solutions (CSITSS);2022-12-21
2. Design and Implementation of Enhanced Edge Triggered Flip-Flop for Low Power Dissipation;Journal of Nanoelectronics and Optoelectronics;2022-09-01
3. Memristor based high speed and low power consumption memory design using deep search method;Journal of Ambient Intelligence and Humanized Computing;2020-03-04