1. K. Kaul, R. Vermuri, S. Govindarajan, I. Ouaiss, An automated temporal partitioning tool for a class of DSP application workshop and reconfigurable computing, in: International Conference on Parallel Architecture and Compilation Technique PACT, 1998, pp. 22–27.
2. Byungil Jeong, Hardware Software Partitioning for Reconfigurable Architectures, MS theses School of Elec. Eng, Seoul National University. 1999.
3. J.M.P. Cardoso, H.C. Neto, An enhance static-list scheduling algorithm for temporal partitioning onto rpus, IFIP TC10 WG10.5 in: 10 Int. Conf. on Very Large Scale Integration (VLSI’99), Portugal, 1999, pp. 485–496.
4. Synthesis and time partitioning for reconfigurable systems;Ouni;Design Automation for Embedded Systems Journal,2005
5. K. Kaul, R. Vermuri, Integrate Block processing and design space exploration in temporal partitioning for RTR architecture, in: International Reconfigurable Architecture Workshop, RAW’99, Springer Publication, pp. 606–615.