Designing efficient accelerator of depthwise separable convolutional neural network on FPGA-Reference-Cited by-同舟云学术

Designing efficient accelerator of depthwise separable convolutional neural network on FPGA

Author:

Ding Wei,Huang Zeyu,Huang Zunkai^ORCID,Tian Li,Wang Hui,Feng Songlin

Funder

Shanghai Municipal Science and Technology Commission

Chinese Academy of Sciences

Publisher

Elsevier BV

Subject

Hardware and Architecture,Software

Reference42 articles.

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