Analysis of critical thermal issues in 3D integrated circuits

Author:

Tavakkoli Fatemeh,Ebrahimi Siavash,Wang Shujuan,Vafai Kambiz

Publisher

Elsevier BV

Subject

Fluid Flow and Transfer Processes,Mechanical Engineering,Condensed Matter Physics

Reference44 articles.

1. 3D chip stack technology using through-chip interconnects;Benkart;IEEE Des. Test Comput.,2005

2. Three-dimensional integrated circuits;Topol;IBM J. Res. Dev.,2006

3. S. Im, K. Banerjee, Full chip thermal analysis of planar (2-D) and vertically integrated (3-D) high performance ICs, in: Electron Devices Meeting, 2000, IEDM ’00, Technical Digest, International, 2000, pp. 727–730.

4. K.A. Jenkins, R.L. Franch, Impact of self-heating on digital SOI and strained-silicon CMOS circuits, in: IEEE International SOI Conference, 2003, pp. 161–163.

5. 3-D ICs: a novel chip design for improving deep-submicrometer interconnect performance and systems-on-chip integration;Banerjee;Proc. IEEE,2001

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