Author:
Chen Yu Ting,Anderson Jason H.
Cited by
6 articles.
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1. Parallelising Control Flow in Dynamic-scheduling High-level Synthesis;ACM Transactions on Reconfigurable Technology and Systems;2023-09
2. Dynamic Inter-Block Scheduling for HLS;2022 32nd International Conference on Field-Programmable Logic and Applications (FPL);2022-08
3. High-Level Synthesis of Transactional Memory;Proceedings of the 26th Asia and South Pacific Design Automation Conference;2021-01-18
4. A Survey on Performance Optimization of High-Level Synthesis Tools;Journal of Computer Science and Technology;2020-05
5. Boyi;Proceedings of the 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays;2020-02-23