Simulation study on radiation hardness for total ionizing dose effect of ultra-thin shielding layer 300 V SOI LDMOS

Abstract

In this work, the linear current degradation mechanism of 300 V silicon-on-insulator laterally double-diffused metal-oxide-semiconductor field effect transistor under total ionizing effect is studied, and a method in radiation-hardness for linear current by introducing an ultra-thin shielding layer is proposed. This new structure is realized with P-type ultra-thin shielding layer implantation under field oxide, in order to prevent the P-type layer from complete surface inversion, thereby truncating the surface current route and mitigating the current degradation effectively. For a laterally double-diffused metal-oxide-semiconductor field effect transistor, linear current degradation can be attributed mainly to holes introduced in the field oxide. In this work, the influence of introduced holes on electrical properties in the transistor oxides under harsh environment is simulated based on device and process simulation software, with optimized layer length, implantation energy, lateral distance and dose window, and the goal of linear current hardness (linear current increment decreasing from 447% in conventional structure to less than 10% in proposed structure) is achieved while maintaining pre-rad and post-rad breakdown voltages above 300 V under total dose of 0–500 krad(Si).