Monolithic and catalyst-free selective epitaxy of InP nanowires on Silicon

Abstract

Abstract The integration of both optical and electronic components on a single chip, despite the challenge, holds the promise of compatibility with CMOS technology and high scalability. Among all candidate materials, III-V semiconductor nanostructures are key ingredients for opto-electronics and quantum optics devices, such as light emitters and harvesters. The control over geometry, and dimensionality of the nanostructures, enables one to modify the band structures, and hence provide a powerful tool for tailoring the opto-electronic properties of III-V compounds. One of the most creditable approaches towards such growth control is the combination of using patterned wafer and the self-assembled epitaxy. This work presents monolithically integrated catalyst-free InP nanowires grown selectively on nanotip-patterned (001)Si substrates using gas-source molecular-beam epitaxy. The substrates are fabricated using CMOS nanotechnology. The dimensionality of the InP structures can be switched between two-dimensional nanowires and three-dimensional bulk-like InP islands by thermally modifying the shape of Silicon nanotips, surrounded by the SiO2 layer during the oxide-off process. The structural and optical characterization of nanowires indicate the coexistence of both zincblende and wurtzite InP crystal phases in nanowires. The two different crystal structures were aligned with a type-II heterointerface.