3D Network-On-Chip Data Acquisition System Mapping Based on Reinforcement Learning and Improved Attention Mechanism

Author:

Xu Chuanpei,Shi Xiuli,Wang Yang

Abstract

Abstract The 3D Network-on-Chip (NoC) data acquisition system utilizes NoC technology to establish a time-interleaved data acquisition system The mapping scheme determines the location of each Intellectual Property (IP) node in the NoC topology. The optimization of the mapping algorithm is one of the important means to reduce the communication delay of the acquisition system. The abundance of functional IP nodes in the 3D NoC data acquisition system creates a mapping challenge. To address this, we propose a mapping algorithm called Reinforcement Learning and an improved Attention Mechanism Mapping algorithm (RA-Map). The RA-Map mapping algorithm employs node function encoding and node position encoding to express the properties of an IP node in the task graph preprocessing. The local attention mechanism is used in the mapping network encoder, and the fusion of dynamic key node information is proposed in the decoder. The mapping result evaluation network achieves unsupervised training of the mapping network. These targeted improvements ultimately lead to an enhancement in mapping quality. Experimental results demonstrate that when compared to the discrete particle swarm algorithm and simulated annealing algorithm, the RA-Map mapping algorithm reduces the average communication cost by 6.5% and 8.5%, respectively. Furthermore, while ensuring mapping quality, it also shortens the mapping time.

Publisher

Research Square Platform LLC

Reference28 articles.

1. Choubey A, Kumar, Raushan R (2006) "High-speed data acquisition system design. "2006 1st International Symposium on Systems and Control in Aerospace and Astronautics. IEEE,

2. Design of time-interleaved data acquisition system based on Network on Chip;Zhao J;Concurrency and computation: practice and experience,2021

3. Performance Evaluation of Application Mapping Approaches for Network-on-Chip Designs;Amin W;IEEE Access PP,2020

4. Reza Md, Farhadur et al (2018) "Neuro-NoC: Energy optimization in heterogeneous many-core NoC using neural networks in dark silicon era." 2018 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE,

5. Ostler C, Karam S (2007) Chatha. "An ILP formulation for system-level application mapping on network processor architectures." 2007 Design. Automation & Test in Europe Conference & Exhibition. IEEE,

Cited by 1 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

同舟云学术

1.学者识别学者识别

2.学术分析学术分析

3.人才评估人才评估

"同舟云学术"是以全球学者为主线,采集、加工和组织学术论文而形成的新型学术文献查询和分析系统,可以对全球学者进行文献检索和人才价值评估。用户可以通过关注某些学科领域的顶尖人物而持续追踪该领域的学科进展和研究前沿。经过近期的数据扩容,当前同舟云学术共收录了国内外主流学术期刊6万余种,收集的期刊论文及会议论文总量共计约1.5亿篇,并以每天添加12000余篇中外论文的速度递增。我们也可以为用户提供个性化、定制化的学者数据。欢迎来电咨询!咨询电话:010-8811{复制后删除}0370

www.globalauthorid.com

TOP

Copyright © 2019-2024 北京同舟云网络信息技术有限公司
京公网安备11010802033243号  京ICP备18003416号-3