1. 1) Fauth, A., Van Praet, J. and Freericks, M.: Describing Instruction Set Processors Using nML, Proc. European Design and Test Conference, pp.503-507 (March 1995).
2. 2) Clements, P.C.: A Survey of Architecture Description Languages, Proc. 8th International Workshop on Software Specification and Design, p.16 (March 22-23, 1996).
3. 3) Zivojnovic, V., Pees, S. and Meyr, H.: LISA-machine description language and generic machine model for HW/SW co-design, Proc. IEEE Workshop on VLSI Signal Processing IX, pp.127-136 (1996).
4. 4) Halambi, A., Grun, P., Ganesh, V., Khare, A., Dutt, N. and Nicolau, A.: EXPRESSION: A Language for Architecture Exploration through Compiler/Simulator Retargetability, Proc. Design Automation and Test in Europe (DATE '99), pp.485-490 (1999).
5. 5) Kobayashi, S., Takeuchi, Y., Kitajima, A. and Imai, M.: Compiler Generation in PEAS-III: an ASIP Development System, International Workshop on Software and Compilers for Embedded Processors (SCOPES) (2001).